Relay latching circuit



Feb. 25, 1969 E. 1'. CALKIN Eng RELAY LATCHING CIRCUIT Filed Sept. 21. 1966 Sheet of 2 FIG. Il-l RELAY u \ENERGIZED FIG. 2B RESPONSE ,DEENERGlZED RELAY I2 4 CENERGIZED FIG. 2C RESPONSE. L I l DEENERGIZED\ LATCH G RELAY DRIVER COLLECTOR l I I 2F CURRENT FIG. 3

CURRENT 12-3 SENSING -'-Lx, NETWORK 5.x CALK/N WI/ENTO/Ps .1 m IANNIELLO AZZTQRNEK Feb. 25, 1969 E. 'r. CALKIN em.

Filed Sept. 21, 1966 of 2 A Sheet n ET M? 7; n I 1.. I 3 W 8 WM SW58 $\P n 5 52 JD m Q U MLQ- J on T3 E MW k 3i NW I NW W WWT m W MT S m United States Patent 3,430,107 RELAY LATCHING CIRCUIT Edwin T. Calkin, Parsippany, and Joseph W. Ianniello,

Morristown, N.J., assignors to Bell Telephone Laboratories Incorporated, Murray Hill, N.J., a corporation of New York Filed Sept. 21, 1966, Ser. No. 581,098

U.S. Cl. 317137 Int. Cl. H0111 47/04 This invention relates generally to relay latching circuits and, more particularly, to relay latching circuits which are responsive to very short duration input pulses.

A relay latching circuit is an arrangement of one or more relays together with a power source, associated electronic components, and relay drive circuitry, which provides for the energization of a selected relay in response to a short duration input pulse and for the continuation of such relay energization even after the input signal ceases until, for instance, a deenergize command is issued.

In certain relay latching circuit applications it is required to energize an especially fast acting relay in response to a very short duration control pulse. Because of the limited number of relay contacts available on such a fast acting relay, it may be necessary that together with the fast acting relay another relay having the required additional relay contacts becomes energized in response to the same short control pulse.

In another relay latching circuit application it may, for instance, be required to energize a common fast acting relay from any one of a plurality of short duration input signals and at the same time memorize which one of the individual inputs furnished the energizing signal.

The primary object of the invention is to provide for a relay latching circuit that is capable of responding to input pulses of very short duration.

Another object of the invention is to provide for a relay latching circuit in which a common fast acting relay may be energized by any one of a plurality of individual short duration input pulses.

A further object of the invention is to memorize in a relay latching circuit which one of a plurality of inputs energized a common fast acting relay.

Still another object of the invention is to extend the useful application of fast acting relays having a limited number of relay contacts.

The invention accomplishes these objects by using a latching network together with a relay drive circuit to augment a short duration input signal to a relay drive circuit. The short duration input pulse initiates conduction in the relay drive circuit to energize the fast acting relay and to activate the latching network. The latching network, in turn, augments the input to the relay drive circuit beyond the duration of the short duration input pulse to allow the energization of a slow acting relay in addition to the immediately energized fast acting relay.

In one advantageous embodiment of the invention a short duration input pulse forward biases a relay drive transistor, thereby almost immediately energizing a fast acting relay having its coil connected in the emittercollector path of the relay drive transistor. However, because of the required fast switching action, the fast acting relay that is used in this circuit application has but a limited number of relay contacts. As a result, another relay having the necessary relay contacts to perform all of the required switching functions must be energized together with the fast acting relay. In order to accomplish the energization of another slower relay, the invention provides for a latching network that is associated with the relay drive stage. One of the limited number of relay contacts of the fast acting relay activates at the Claims 3,430,107 Patented Feb. 25, 1969 instant of energization the latching network to augment and retain the forward bias on the relay drive transistor. The relay drive transistor, therefore, extends its conduction period past the duration of the short input pulse. As a result, the slower relay which has the necessary additional relay contacts to perform other required switching functions is allowed to energize. Consequently, the invention provides for a latching circuit that has the re quired fast action by the fast acting relay and which allows, in addition, the energization of the slow acting relay which has the required additional relay contacts to perform the necessary switching functions.

In another advantageous embodiment of the invention an individual latching network is associated with each one of a plurality of relay drive circuits. Individual control pulses are applied to the individual relay drive circuits to energize a common fast acting relay. Through the action of the particular latching network that is associated with a respective relay drive circuit, a slow acting relay that is associated with the particular relay drive circuit is also allowed to energize. The contacts on the slow acting relay may be used to perform additional required switching functions, such as to indicate which particular input caused the fast acting relay to energize. Once one of the slow acting relays has energized, however, the latching networks associated with the remaining drive circuits are disabled, thereby preventing the further energization of any of the other slow acting relays. The circuit may be enabled again by the momentary interruption of the relay power path by means of a switch at some convenient point in the power circuit.

The above and other features of the invention will be more fully understood from the following detailed description. In the drawing:

FIG. 1 is a schematic diagram of one specific embodiment of the invention having one pulse input;

FIGS. 2A through 2F show waveforms illustrating the operation of the embodiment of FIG. 1;

FIG. 3 is a schematic diagram showing a load current control circuit embodying the invention; and

FIG. 4 is a schematic diagram of another embodiment of the invention in which one of a plurality of input pulses may energize a common fast acting relay.

In FIG. 1 a relay latching circuit is shown in which a direct current power source 10 supplies power for the fast acting relay 11 and for a slower acting relay 12 through a relay drive transistor 13 and through a reset switch 14. Power is supplied from one terminal of source 10 through the normally closed contacts of reset switch 14 to one junction point of the parallel connected operating coils of relays 11 and 12. The other junction point of the coils of relays 11 and 12 is connected to the collector electrode of relay drive transistor 13. The power path is completed by connecting the emitter electrode of relay drive transistor 13 to the other terminal of power source 10. The collector electrode of transistor 13 is also connected to the other terminal of power source 10 through normally open relay contacts 12-1.

In order to provide for the latching of relays 11 and 12 by augmenting and retaining the forward bias on transistor 13, a latching network comprising resistors 15, 1'6, and 17 and a latching transistor 18 are included in the relay latching circuit. The series combination of resistors 15 and 16 is connected between the emitter electrode of transistor 18 and the collector electrode of relay drive transistor 13. The emitter electrode of transistor 18 is also connected to the junction of the operating coils of relays 11 and 12 and one terminal of reset switch 14 through the normally open contacts 11-1 of relay 11, and the junction of resistors 15 and 16 is connected to the base electrode of latching transistor 18. Resistor 17 is connected between the collector electrode of latching transistor (18 and the base electrode of relay drive transistor 13. A resistor 19 is connected between the base electrode and the emitter electrode of relay drive transistor 13. Control pulses to energize the relay latching circuit are supplied from a pulse source which applies pulses of very short duration to the base electrode of relay drive transistor '13.

Before any pulses are applied to relay drive transistor 13, transistor 13 does not conduct and relays 11 and 12 are deenergized. Relay 11 is a fast acting relay; that is, its energization characteristic is such that, if a pulse of the duration shown FIG. 2 A is applied to the coil of relay 11, the relay will be able to energize during the duration of this very short pulse. The response characteristic of fast acting relay 11 is shown in FIG. 2B, where the relay is shown to energize at time t after a pulse has been applied at time t Relay 12, on the other hand, is a slow acting type relay which has a response characteristic as shown in FIG. 20. That is, if an energizing pulse of sufficient duration were to be applied at time t the relay would not energize until time 12,. It is therefore evident that if a relatively short pulse of the type shown in FIG. 2A were to be applied to the operating coil of relay 12, relay 12 would not be able to energize.

To initiate the operation of the relay latching circuit of FIG. 1, a short control pulse, as shown in FIG 2A, is applied from pulse source 20 to the base electrode of relay drive transistor 13. The applied pulse forward biases the base-emitter junction of transistor 13 so that the transistor will start to conduct in its emitter-collector path at time I The collector current of relay drive transistor 13 is illustrated in FIG. 2F. As a result of the conduction of relay drive transistor 13, relay 11 will energize at time t as shown in FIG. 2B. As soon as relay 11 energizes, relay contacts 11-1 close to apply power to the latching network. Current therefore flows from source 10, through the emitter-collector path of transistor 13 and through resistors 15 and 16, which current, in turn, forward biases the base-emitter junction of latching transistor 18. Latching transistor 18 therefore starts to conduct and supplies current through resistor 17 to the base of relay drive transistor 13. The conduction of latching transistor 18 is illustrated in FIG. 2D. As soon as latching transistor 18 conducts, its collector current augments the base current of relay drive transistor 13 as illustrated in FIG. 2E. As a result, relay drive transistor 13 will continue to conduct as shown in FIG. 2F even after time t when the input pulse has ceased. Because of the continuing conduction of relay drive transistor 13, energizing power continues to be applied to relay .12 so that relay 12 is enabled to energize at time t As soon as relay 12 energizes, relay contacts 112-1 close, whereby the collector of transistor 13 is bypassed and relays 11 and 12 receive their energizing power from the common terminal of source 10 through relay contacts 12-1. In order to deenergize relays 11 and 12, reset switch 14 may be opened momentarily to interrupt the relay power path.

FIG. 3 shows a schematic diagram of a load control circuit embodying the invention illustrated in FIG. 1. Components of the circuit illustrated in FIG. 3 that are the same as the components of the circuit of FIG. 1 have been given the same numercial component designations In the circuit of FIG. 3 a load 30, a current sensing network 31, a power-on indicator lamp 32, and a fault indicator lamp 33 have been added to the circuit of FIG. 1. Current sensing network 31 senses the load current through load 30, where load is of the type that requires a very fast cutoff once the load current exceeds a predetermined cutoif value.

Before any input pulse is applied to relay drive transistor 13 from current sensing network 31, power is supplied throughthe normally closed reset switch 14 and relay contacts 11-1 from power source 10 to load 30.

4 Current sensing device 31 senses the load current through load 30. When the load current exceeds a predetermined cutolf valve, current sensing element 31 generates a pulse which in turn forward biases relay drive transistor 13 to energize the fast acting relay '11. As a result, the normally closed relay contacts 11-1 open, thereby opening the power path to load 30 and, at the same time, actuating the latching network. The latching network, in turn, augments the input to relay drive transistor 13 to assure the energization of relay 12 even though the input pulse has terminated already. In addition to bypassing relay drive transistor 13 by relay contacts 12-1, additional contacts on relay 12 may perform various other required circuit functions. The normally closed contacts 12-2, for instance, complete the power path for and energize poweron indicator lamp 32 during normal load current conditions when relay 12 is deenergized. The normally open relay contracts 12-3, on the other hand, complete the power path for a fault indicator lamp 33- when relay '12 energizes in response to an excess load current. Additional contacts, such as contacts 12-4 and 12-5, may be used for other external switching requirements.

Another specific embodiment of the invention in which a common fast acting relay device may be activated by any one of a number of pulse inputs is illustrated in FIG. 4. In the relay latching circuit of FIG. 4 a fast acting relay 40, having at least one normally open contact 40-1, is energized in response to any one of a plurality of input pulses of short duration. The input pulses are supplied by pulse source 41 through pulse outputs 41-1, 41-2, and 41-3 to the inputs of relay drive circuits 42, 43, and 44, respectively. Each of latching networks 45, 46, and 47 is associated with a respective one of relay drive circuits 42, 43, and 44. Power for the relay latching circuit is supplied from direct current power source 48. Normally closed reset switch 49 is used to momentarily interrupt the power path of the latching circuit to deenergize all of the previously energized relays.

Relay drive circuit 42 comprises a relay drive transistor 50 having a base electrode, a collector electrode, and an emitter electrode, a slow acting relay 51 having at least one normally open relay contact 51-1, a resistor 52, and diodes 53 through 56. The input pulse is supplied from pulse source 41 through its output 41-1 to the base electrode of relay drive transistor 50. The operating coil of relay 51 is connected between the collector electrode of transistor 50 and the positive terminal of power source 48. Diode 53 has its anode connected to the emitter electrode of transistor 50 and its cathode connected to the common negative terminal of power source 48. Resistor 52 is connected between the base electrode of transistor 50 and the common negative terminal of power source 48. Diodes 54, 55, and 56 have their cathodes connected to the collector electrode of transistor 50. The anodes of diodes 54, 55, and 56, as well as the collector electrode and base electrode of transistor 50 are connected to external circuit points, which connections will be described in conjunction with the overall latching circuit description. Normally open relay contact 51-1 is connected between the collector electrode of transistor 50 and the common negative terminal of power source 48. Relay drive circuits 43 and 44 are similar to relay drive circuit 42, except that relay drive circuits 43 and 44 receive their pulse inputs from outputs 41-2 and 41-3 of pulse source 41, respectively.

Latching network 45 comprises a latching transistor 60 having a base electrode, an emitter electrode, and a collector electrode, resistors 61, 62, and 63, and diodes 64, 65, and 66. One terminal of resistor 61 and the anode of diode 64 are connected together, and normally open relay contacts 40-1 are connected between this junction point and one terminal of reset switch 49. The other terminal of resistor 61 is connected to the junction point of one terminal of resistor 62 and of the base electrode of transistor 60. The other terminal of resistor 62 is connected to the anode of diode 66. Resistor 63 is connected between the anode of diode 65 and the collector electrode of transistor 60, and the emitter electrode of transistor 60 is connected to the cathode of diode 64. The cathodes of diodes 65 and 66 are connected to the base electrode and collector electrode of relay drive transistor 50, respectively, of relay drive circuit 42. The power path for latching network 45 is completed through the normally closed contacts of reset switch 49 to the positive terminal of power source 48. Latching networks 46 and 47 are similar to latching network 45, except that the cathodes of diodes 65 and 66 of latching networks 46 and 47 are connected to the corresponding points of relay drive circuits 43 and 44, respectively.

The operating coil of fast acting relay 40 receives its power on the one side by having one of its coil terminals connected to the positive terminal of power source 48 through the normally closed contacts of switch 49 and, on the other side, from the individual relay drive circuits when they are activated, by having its other coil terminal individually connected to the anode of a diode 54 of each of the relay drive circuits 42, 43 and 44.

One each of the anodes of diodes 55 and 56 of respective relay drive circuits is individually connected to the base electrode of the relay drive transistor of one of the remaining relay drive circuits. That is, the anodes of diodes 55 and 56 of relay drive circuit 42 are individually connected to the base electrode of transistor 50 of relay drive circuits 43 and 44, respectively. The corresponding anodes of diodes 55 and 56 of relay drive circuits 43 and 44, on the other hand, are connected to the base electrode of transistor 50 of relay drive circuits 42, 44, and 42, 43, respectively.

In the embodiment of the invention as illustrated in FIG. 4, fast acting relay 40 is of the same type as relay 11 of FIG. 1, having a response characteristic as shown in FIG. 2B, whereas the relays 51 of the relay drive circuits are slow acting relays of the same type as relay 12 of FIG. 1, having a response time as shown in FIG. 20.

Before any control pulses from pulse source 41 are applied to any one of the relay drive circuits 42, 43 and 44, fast acting relay 40 and the relays 51 of the individual relay drive circuits are deenergized. Normally open relay contact 40-1 therefore prevents the application of power to the latching networks. As a result, no forward bias is applied to any one of the relay drive transistors 50-, so that these transistors are cut off.

When, however, a pulse of the type shown in FIG. 2A is applied from pulse source 41 through output 41-1, for instance, to the base electrode of relay drive transistor 50 of relay drive circuit 42, this relay drive transistor 50 starts to conduct. The conduction of relay drive transistor 50 supplies energizing power for both relays 51 of relay drive circuit 42 and for relay 40. Because of its slow energizing characteristic, however, relay 51 does not immediately energize. Fast acting relay 40, on the other hand, does energize at time t of FIG. 2B in response to the power applied at time t through the emitter-collector path of transistor 50, diodes 53 and 54, and through the closed contacts of reset switch 49.

The energization of relay 40 closes relay contact 40-1, thereby applying power to latching networks 45, 46, and 47. Since relay drive transistor 50 of relay drive circuit 42 is conducting, current flows through the divider network of resistors 61 and 62 from the power source 48 through relay contact 40-1, diodes 53 and 66, and the emitter-collector path of relay drive transistor 50 to forward bias the base-emitter junction of latching transistor 60. Latching transistor 60 begins therefore to conduct at time t as shown in FIG. 2D.

The resulting emitter-collector current of latching transistor 60, is, in turn, applied through resistor 63 and diode 65 to the base electrode of relay drive transistor 50 of relay drive circuit 42 to augment the initial drive current of the pulse input. from pulse source 41. The resultant base drive current of relay drive transistor 50 is shown in 6 FIG. 2B. When, therefore, at time t of FIG. 2A the input pulse ceases, transistor 50 remains in its conducting state because of this augmented drive current. As a result, a continuous energizing current is applied to relay 51 even after the input pulse has ceased, so that relay 51 is able to energize at time t, of FIG. 2C.

As soon as relay 51 of relay drive circuit 42 energizes, its contact 51-1 closes to bypass diode 53 and the emittercollector path of transistor 50. The closing of relay contact 51-1 also applies the common negative potential of power source 48 to the cathodes of diodes 55 and 56 of relay drive circuit 42. The anodes of diodes 55 and 56 are, in turn, connected to the input points, that is, to the base electrode of relay drive transistor 50, of relay drive circuits 43 and 44, respectively. As a result, these input points are placed at circuit common potential through the respective diode so that further inputs to relay drive circuits 43 and 44 are ineffective. Relay drive circuits 42 and 43 are, therefore, disabled as soon as relay 51 of relay drive circuit 42 has energized, thereby preventing the energization of any further relays.

Similarly, when an input pulse is applied from pulse source 41 to either one of relay drive circuits 43 or 44 the fast acting relay 40 would first be energized to be followed by the energization of the respective relay 51, which would result in the disabling of the remaining relay drive circuits. Relays 51 of relay drive circuits 42, 43, and 44 may have additional relay contacts which can be used to perform the required switching functions of the particular circuit application. The relay latching circuit may also be extended to include any number of inputs to energize the common fast acting relay 40.

The ralay latching circuit of the present invention provides, therefore, for a simple and eificient arrangement to energize a common fast acting relay together with a corresponding slower acting relay to perform additional switching functions which cannot be performed by the fast acting relay because of its limited number of available relay contacts.

It is to be understood that the above-described arrangements are illustrative of the .application of the principles of the invention. Numerous other arrangements may be devised by those skilled in the art without departing from the spirit and scope of the invention.

What is claimed is:

1. A relay latching circuit comprising a first fast acting relay having an operating coil and at least one set of normally open contacts, a second relay having a response time slower than that of said first relay and having an operating coil and at least one set of normally open contacts, a source of driving current, a relay drive transistor having its emitter-collector path connected in parallel with the normally open contacts of said second relay and connected in series with said source and the operating coils of said first and second relays in parallel, the emitter-collector path of said transistor being poled to pass current from said source in the forward direction when the base-emitter junction of said transistor has a suflicient forward bias, means for applying a forward biasing control pulse to the base-emitter junction of said relay drive transistor to switch the emitter-collector path of said transistor into conduction, and means associated with said transistor to retain the forward bias on the base-emitter junction of said transistor even after said control pulse has been removed, whereby the emittercollector path of said transistor is maintained in a conducting state until said second relay energizes.

2. A relay latching circuit in accordance with claim 1 in which said bias retaining means comprises a latching transistor having a collector electrode, a base electrode, and an emitter electrode, and first, second, and third resistors, said first and second resistors being serially connected between the emitter electrode of said latching transistor and the collector electrode of said relay drive transistor, the junction point between said first and second resistors being connected to the base electrode of said latching transistor, said third resistor being connected between the collector electrode of said latching transistor and the base electrode of said relay drive transistor, and the emitter electrode of said latching transistor being connected through said normally open contacts of said first relay to said source of driving current, whereby the energization of said first relay activities said relay latching circuit.

3. A relay latching circuit to energize a common fast acting relay having at least one set of normally open contacts in response to a control pulse applied to one of a plurality of inputs comprising in combination a plurality of relays each having a response time slower than that of said common fast acting relay and each having an operating coil and at least one set of normally open contacts, a source of driving current, a plurality of relay drive transistors each having its emitter-collector path connected in parallel with the normally open contacts of a respective one of said plurality of relays and connected in series with said current source and the operating coil of said respective relay, the emitter-collector paths of said transistors being poled to pass current from said current source in the forward direction when the base-emitter junction of a respective transistor has a sutficient forward bias, means for applying forward biasing control pulses to the individual base emitter junctions of said plurality of relay drive transistors to switch the emitter collector path of a respective transistor into conduction, a plurality of unidirectionally conducting devices, means for connecting the coil of said common fast acting relay in series with said source and the parallel combination of the emittercollector paths of said relay drive transistors, each of said parallel paths including one of said emitter-collector paths to said fast acting relay, and means associated with each of said transistors to retain the forward bias on the baseemitter junction of said respective relay drive transistor in response to a respective control pulse input to said transistor, said control pulse first energizing said common fast acting relay to activate said respective bias retaining means, thereby maintaining said respective relay drive transistor in the conducting state until the respective relay energizes, and gating means to short out the remaining inputs after said respective relay has energized, thereby preventing the energization of another of said relays.

4. A relay latching circuit in accordance with claim 3 in which each of said bias retaining means comprises a latching transistor having a collector electrode, a base electrode, and an emitter electrode, first, second, and third resistors and first and second diodes, said first and second resistors being serially connected between the emitter electrode of said latching transistor and the anode of said first diode, the cathode of said first diode being connected to the collector electrode of a respective one of said relay drive transistors, the junction point between said first and second resistors being connected to the base electrode of said latching transistor, said third resistor being connected between the collector electrode of said latching transistor and the anode of said second diode, the cathode of said second diode being connected to the base electrode of said respective drive transistor, the emitter electrodes of respective latching transistors all being connected to one common terminal, and said common terminal being connected through said normally open contacts of said common fast acting relay to said source of driving current.

5. A relay latching circuit in accordance with claim 4 in which said gating means comprises a plurality of diodes, and means to individually connect one each of said diodes between the collector electrode of one each of said relay drive transistors and the base electrode of one each of said respective remaining relay drive transistors, each of said diodes having its anode connected to the collector electrode of a respective drive transistor and its cathode connected to the base electrode of a respective other relay drive transistor.

US. Cl. X.R. 317l48.5, 154 

1. A RELAY LATCHING CIRCUIT COMPRISING A FIRST FAST ACTING RELAY HAVING AN OPERATING COIL AND AT LEAST ONE SET OF NORMALLY OPEN CONTACTS, A SECOND RELAY HAVING A RESPONSE TIME SLOWER THAN THAT OF SAID FIRST RELAY AND HAVING AN OPERATING COIL AND AT LEAST ONE SET OF NORMALLY OPEN CONTACTS, A SOURCE OF DRIVING CURRENT, A RELAY DRIVE TRANSISTOR HAVING ITS EMITTER-COLLECTOR PATH CONNECTED IN PARALLEL WITH THE NORMALLY OPEN CONTACTS OF SAID SECOND RELAY AND CONNECTED IN SERIES WITH SAID SOURCE AND THE OPERATING COILS OF SAID FIRST AND SECOND RELAYS IN PARALLEL, THE EMITTER-COLLECTOR PATH OF SAID TRANSISTOR BEING POLED TO PASS CURRENT FROM SAID SOURCE IN THE FORWARD DIRECTION WHEN THE BASE-EMITTER JUNCTION OF SAID TRANSISTOR HAS A SUFFICIENT FORWARD BIAS, MEANS FOR APPLYING A FORWARD BIASING CONTROL PULSE TO THE BASE-EMITTER JUNCTION OF SAID RELAY DRIVE TRANSISTOR TO SWITCH THE EMITTER-COLLECTOR PATH OF SAID TRANSISTOR INTO CONDUCTION, AND MEANS ASSOCIATED WITH SAID TRANSISTOR TO RETAIN THE FORWARD BIAS ON THE BASE-EMITTER JUNCTION OF SAID TRANSISTOR EVEN AFTER SAID CONTROL PULSE HAS BEEN REMOVED, WHEREBY THE EMITTERCOLLECTOR PATH OF SAID TRANSISTOR IS MAINTAINED IN A CONDUCTING STATE UNTIL SAID SECOND RELAY ENERGIZES. 